While at AVBS, Jijon worked on an asynchronous interleaved algorithm and chip for encoding music and lowering stimulation power in bionic-ear processors.

Publications

J.J. Sit and R. Sarpeshkar, “A micropower logarithmic A/D with offset and temperature compensation,” IEEE Journal of Solid State Circuits, Vol. 39, No. 2, pp. 308-319, 2004.

J. Sit, A. M. Simonson, A. J. Oxenham, M. A. Faltys, and R. Sarpeshkar, “A low-power asynchronous interleaved sampling algorithm for cochlear implants that encodes envelope and phase information”, IEEE Transactions on Biomedical Engineering, Vol. 54, pp. 138-149, 2007.

J. Sit and R. Sarpeshkar, “A Cochlear-Implant Processor for Encoding Music and Lowering Stimulation Power,” IEEE Pervasive Computing--special issue on implantable electronics, Vol. 1, No. 7, pp. 40-48, 2008.

The Asynchronous Interleaved Stimulation (AIS) Bionic Ear Processor