Energy-Efficient
Multimedia Systems Group

Professor Vivienne Sze

Talks and Tutorials

  • “Tutorial on Hardware Architectures of Deep Neural Networks,” ISCA 2017, presented on June 24, 2017 (also appeared at MICRO-49) [ Website ]
    • Background of Deep Neural Networks [ slides ]
    • Survey of DNN Development Resources [ slides ]
    • Survey of DNN Hardware [ slides ]
    • DNN Accelerator Architectures [ slides ]
    • Advanced Technology Opportunities [ slides ]
    • Network and Hardware Co-Design [ slides ]
    • Benchmarking Metrics [ slides ]
    • Summary [ slides ]
    • References [ slides ]
    • Entire Tutorial [ slides ]
  • V. Sze, “What If Your Smart Phone Didn’t Need The Cloud?,” MIT ILP Europe Conference in Vienna, presented on March 29, 2017.
  • V. Sze, “Joint Design of Algorithms and Hardware for Energy-Efficient DNNs,” NIPS 2016 Workshop on Efficient Methods for Deep Neural Networks, presented on December 9, 2016. [ Slides ]
  • V. Sze, Y.H. Chen, “Building Energy-Efficient Accelerators for Deep Learning,” Deep Learning Summit Boston – RE•WORK, presented on May 12, 2017. [ Slides ]
  • V. Sze, “Energy-Efficient Hardware for Embedded Vision and Deep Convolutional Neural Networks,” [ Slides ] presented at
    • ICML 2016 Workshop on On-Device Intelligence (June 24, 2016)
    • CVPR 2016 Embedded Vision Workshop (July 1, 2016)
    • Embedded Vision Alliance (September 20, 2016)
    • ICCAD 2016 Workshop on Hardware and Algorithms for Learning On-a-chip (November 10, 2016)

  • V. Sze, M. Budagavi, “Design and Implementation of Next Generation Video Coding Systems (H.265/HEVC Tutorial),” IEEE International Symposium on Circuits and Systems (ISCAS), presented on June 1, 2014. [ Slides ]