Energy-Efficient
Multimedia Systems Group

Professor Vivienne Sze

Talks and Tutorials

MIT Professional Education Short Course on Designing Efficient Deep Learning Systems

Videos of talks and demos can be found on our YouTube channel. To subscribe click here.

  • V. Sze, “Energy-Efficient Edge Computing for AI-driven Applications,” Keynote at 2018 International Conference on Field-Programmable Logic and Applications (FPL), presented on August 27, 2018 [ Slides ]
  • V. Sze, “Energy-Efficient Processing at the Edge: From Compressing to Understanding Pixels,” Keynote at 2018 Picture Coding Symposium, presented on June 25, 2018 [ Slides ]
  • V. Sze, “Hardware for Machine Learning: Design Considerations,” Symposia on VLSI Technology and Circuits, Forum on Machine Learning Today and Tomorrow: Technology, Circuits and System View, presented on June 22, 2018 [ Slides ]
  • V. Sze, “Energy-Efficient Deep Learning: Challenges and Opportunities,” IEEE/SSCS IEEE Distinguished Lecture/Webinar, presented on April 10, 2018 [ Slides ]
  • V. Sze, “Understanding the Limitations of Existing Energy-Efficient Design Approaches for Deep Neural Networks,” Forum on The Next Waves of Machine and Deep Learning Hardware at CICC 2018, presented on April 9, 2018 [ Slides ]
  • V. Sze, “Energy-Efficient Edge Computing for AI-driven Applications,” Keynote at 2018 UIUC CSL Student Conference, presented on February 22, 2018 [ Slides ]
  • V. Sze, “Efficient Edge Solutions for Deep Learning Applications,” Short Course on Hardware Approaches to Machine Learning and Inference at ISSCC 2018, presented on February 15, 2018 [ Slides ]
  • V. Sze, “Efficient Processing for Deep Learning,” Embedded Vision Webinar, presented on September 28, 2017 [ Slides ]
  • “Tutorial on Hardware Architectures of Deep Neural Networks,” ISCA 2017, presented on June 24, 2017 (also appeared at MICRO-49) [ Website ]
    • Background of Deep Neural Networks [ slides ]
    • Survey of DNN Development Resources [ slides ]
    • Survey of DNN Hardware [ slides ]
    • DNN Accelerator Architectures [ slides ]
    • Advanced Technology Opportunities [ slides ]
    • Network and Hardware Co-Design [ slides ]
    • Benchmarking Metrics [ slides ]
    • Summary [ slides ]
    • References [ slides ]
    • Entire Tutorial [ slides ]
  • V. Sze, “What If Your Smart Phone Didn’t Need The Cloud?,” MIT ILP Europe Conference in Vienna, presented on March 29, 2017.
  • V. Sze, “Joint Design of Algorithms and Hardware for Energy-Efficient DNNs,” NIPS 2016 Workshop on Efficient Methods for Deep Neural Networks, presented on December 9, 2016. [ Slides ]
  • V. Sze, Y.H. Chen, “Building Energy-Efficient Accelerators for Deep Learning,” Deep Learning Summit Boston – RE•WORK, presented on May 12, 2017. [ Slides ]
  • V. Sze, “Energy-Efficient Hardware for Embedded Vision and Deep Convolutional Neural Networks,” [ Slides ] presented at
    • ICML 2016 Workshop on On-Device Intelligence (June 24, 2016)
    • CVPR 2016 Embedded Vision Workshop (July 1, 2016)
    • Embedded Vision Alliance (September 20, 2016)
    • ICCAD 2016 Workshop on Hardware and Algorithms for Learning On-a-chip (November 10, 2016)

  • V. Sze, M. Budagavi, “Design and Implementation of Next Generation Video Coding Systems (H.265/HEVC Tutorial),” IEEE International Symposium on Circuits and Systems (ISCAS), presented on June 1, 2014. [ Slides ]