Integrated Systems Group | Prof. Vladimir Stojanovic
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Channel-and-Circuits-Aware, Energy-Efficient Coding for High-Speed Links

Sponsors

MARCO Interconnect Focus Center

People

Natasa Blitvic, Maxine Lee, Professor Vladimir Stojanovic and Professor Lizhong Zheng


With state-of-the-art energy-efficiency of 40mW/Gb/s, links in a chip with 40Tb/s I/O throughput, for example, would dissipate 1.6kW of power, requiring 8000 high-speed I/O pins, and the on-chip area of 4000mm2 for 4000 10Gb/s transceivers, in 0.13µm CMOS technology. The switch card would need to be at least 8 feet wide and have a 13-feet-wide connector with today's connector density limit of 50 differential pairs per inch. Clearly, we need to improve both the energy-efficiency of the link cells and per/pin data rate by at least an order of magnitude, to avoid excessive power dissipation and maintain a reasonable size of the system. This data rate scaling is theoretically possible, since the information theoretic capacity of link backplane channels is between 80 and 110 Gb/s [1], as shown in Figs. 1 and 2.

By using multi-tone modulation in links [2] we not only increase the data rate of a link, but also decrease the energy cost of signaling per bit due to parallelism in frequency domain. Unfortunately, the gap of uncoded multi-tone modulation to capacity is still very big (around 14dB) due to very low BER target of 10-15 in these applications and the peak swing constraint of the on-chip driver circuits. The gap is even bigger in today’s state-of-the-art baseband links, where residual interference from reflections and cross-talk limits the scaling of link data rates, requiring the use of costly reflection and cross-talk cancellers.

In this project we aim to extend the link system design to incorporate energy-efficient coding techniques. Using novel energy-efficient coding techniques for non-Gaussian noise and residual interference, we will both increase the achievable data rates and the energy-efficiency of links by drastically off-loading the low-BER target burden and hence decreasing the complexity of the equalization/modulation level. One theoretic footing of our work is based on our recent results in [1],[3], where a new framework was developed to systematically study energy efficient transmissions in a non-ideal environment, with time-varying link quality, peak-power constraint, processing energy overhead, and even modeling errors.

Figure 1:  Legacy (FR4) and new, microwave-engineered (NELCO) backplane channels.   Figure 2:  Legacy channel capacity with 50Ω termination thermal noise and phase noise from LC and ring VCO-based PLL.

 

References

  1. V. Stojanovic, A. Amirkhany, M. Horowitz, "Optimal Linear Precoding with Theoretical and Practical Data Rates in High-Speed Serial-Link  Backplane Communication," IEEE International Conference on Communications, pp. 2799-2806, June 2004.
  2. A. Amirkhany, V. Stojanovic, M. Horowitz,"Multi-tone Signaling for High-speed Backplane Electrical Links," IEEE Global Communications Conference, pp. 1111-1117, December 2004.
  3. P. G. Youssef-Massaad, M. Medard and L. Zheng, "Impact of Processing Energy on the Capacity of Wireless Channels," International Symposium on Information Theory and its Applications (ISITA 2004), October 2004.
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