Yu-Hsin Chen (S’11) received the B. S. degree in Electrical Engineering from National Taiwan University, Taipei, Taiwan, in 2009, and the M. S. degree in Electrical Engineering and Computer Science (EECS) from the Massachusetts Institute of Technology (MIT), Cambridge, MA, in 2013. He is currently a PhD candidate in EECS at MIT working on the architecture design and hardware implementation for deep neural network (DNN) accelerators. He was an intern with the VSSAD group at Intel, Hudson, MA, and the Architecture Research Group at Nvidia, Westford, MA during the summers of 2014 and 2015, respectively, working on architecture development for DNN accelerators. His research interests include energy-efficient VLSI system design, computer vision, and digital signal processing. He is the recipient of the 2015 Nvidia Graduate Fellowship and the 2015 ADI Outstanding Student Designer Award. He has more than 15 authored/co-authored papers in international journals and conferences, including ISSCC, JSSC, ISCA, TCSVT, and Nature. He also co-hosted a tutorial on “Hardware Architectures for Deep Neural Networks” at MICRO-49.