Research: Medical Devices, Low-Power, and Energy-Efficient Systems

prosthetic_arm_systemRecent pioneering work on monkeys and humans by several neurobiologists around the world has resulted in brain-machine interfaces that promise a cure for patients who are paralyzed: Such interfaces use electrodes to record from neurons in motor regions of the brain, decode the intention of the subject to move, and use this decoded signal to move a robotic limb or a computer cursor. Such interfaces require neural recording and amplification from 10 to 100 electrodes, digitization and decoding of these signals to extract the intention to move, wireless telemetry of information from implanted circuitry within the brain to circuitry outside the brain, wireless telemetry of programming parameters from outside the brain to implanted circuitry within the brain, and wireless recharging of implanted circuitry for power.

Work in our lab focuses on building ultra-low-power and miniature circuitry for brain-machine interfaces which could enable them to work on an implanted 100mAh battery for 10 years or more and minimize heat dissipation in the brain. Current interfaces are bulky, 100-10,000 times more power hungry, and often lack wireless capabilities. As part of these ongoing efforts, we have just built the world’s most energy-efficient and low-power neural amplifier, developed very efficient wireless recharging links, and successfully stimulated the brain of a zebra finch bird wirelessly. We are researching the development of ultra-low-power analog decoding algorithms for compression, decoding, and learning, ultra-low-power circuits for spike sorting, recognition, and decoding, adaptive strategies for neural amplification to further lower power, and ultra-low-power wireless telemetry circuits. We are also researching strategies for decoding and recording that will enable longevity of implanted electrodes in the brain.Our work promises to enable large-scale, chronic experimental neuroscience systems (100 to 10,000 electrodes or more). It is useful in prosthetics for paralysis, for the blind, for Parkinson’s disease, and for epilepsy. Brain-machine interfaces are important for several future applications as well in other sensing, motor, or cognitive modalities. Our work is being done in collaboration with neurobiologists and engineers including Professor Richard Andersen’s group at CalTech (work on paralysis), Professor Michale Fee’s group at MIT (work on experimental neuroscience), and with Professor John Wyatt’s group at MIT (work on the blind).

Selected Publications

  1. A GLUCOSE FUEL CELL: Benjamin I. Rapoport, Jakub T. Kedzierski, Rahul Sarpeshkar, “A Glucose Fuel Cell for Implantable Brain-Machine Interfaces,” PLoS ONE, Vol. 7, No. 6, e384386, 2012.
  2. LOW-POWER BRAIN-MACHINE CIRCUITS: R. Sarpeshkar, W. Wattanapanitch, S. K. Arfin, B. I. Rapoport, S. Mandal, M. W. Baker, M. S. Fee, S. Musallam, and R. A. Andersen,”Low-Power Circuits for Brain-Machine Interfaces,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 2, No. 3, pp. 173-183, 2008.
  3. ENERGY-EFFICIENT NEURAL STIMULATION: S.K. Arfin and R. Sarpeshkar, “An Energy-Efficient, Adiabatic Electrode Stimulator with Inductive Energy Recycling and Feedback Current Regulation,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 6, No. 1, pp. 1-14, 2012.
  4. WIRELESS NEURAL STIMULATION: S. K. Arfin, M. A. Long, M. S. Fee, and R. Sarpeshkar, “Wireless Neural Stimulation in Freely Behaving Small Animals,” Journal of Neurophysiology, Vol. 102, No. 1, pp. 598-605, July 2009. [supplementary material]
  5. LOW-POWER RF WIRELESS TELEMETRY: S. Mandal and R. Sarpeshkar, “Power-Efficient Impedance-Modulation Wireless Data Links for Biomedical Implants,” IEEE Transactions on Biomedical Circuits and Systems, Vol.2, No. 4, pp. 301-315, 2008.
  6. ENERGY-EFFICIENT NEURAL RECORDING AMPLIFIER: W. Wattanapanitch, M. Fee and R. Sarpeshkar, “An Energy-Efficient Micropower Neural Recording Amplifier“, IEEE Transactions on Biomedical Circuits and Systems, vol. 1, No. 2, pp. 136-147, June 2007.
  7. RF WIRELESS RECHARGING: M.W. Baker and R. Sarpeshkar, “Feedback Analysis and Design of RF Power Links for Low-Power Bionic Systems,” IEEE Transactions of Biomedical Circuits and Systems, Vol. 1, No. 1, pp. 28—38, April 2007.
  8. BLOCKING-CAPACITOR-FREE ELECTRODE STIMULATION: J. Sit and R. Sarpeshkar, “A low-power, blocking-capacitor-free, charge-balanced electrode-stimulator chip with less than 6nA DC error for 1mA full-scale stimulation,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 1, No. 3, pp. 172-183, September 2007.
  9. LOW-POWER ALGORITHM FOR NEURAL DECODING: B.I. Rapoport, W. Wattanapanitch, H.L. Penagos, S. Musallam, R.A. Andersen, R. Sarpeshkar, “A Biomimetic Adaptive Algorithm and Low-Power Architecture for Implantable Neural Decoders,” Proceedings of the 31st Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC 2009 Minneapolis), 4214-4217 (2-6 September 2009).
  10. BRAIN-MACHINE VISUAL PROSTHESIS ALGORITHM: L. Turicchia, M. O’Halloran, D. P. Kumar, and R. Sarpeshkar, “A Low-Power Imager and Compression Algorithms for a Brain-Machine Visual Prosthesis for the Blind,” Invited Paper, Proceedings of the SPIE, Vol. 7035, pp. 703510-1:703510-13, San Diego, 10-14 August 2008.
  11. EFFICIENT BATTERY-CHARGING CIRCUIT: B. Do Valle, C. Wentz, and R. Sarpeshkar, “An Area and Power-Efficient Analog Li-Ion Battery Charger Circuit,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 5, No. 2, pp. 131-137, 2011.

Bionic Ear – Cochlear Implant

This project focuses on the design of ultra-low-power cochlear-implant systems for the deaf, research that could enable fully implanted systems to become a reality. A recent success from the lab resulted in an analog bionic ear processor that cut power consumption by more than an order of magnitude over the best A-D-then-DSP digital solutions. The power consumption of this processor is so low that it will enable 30 year operation on a 100mAh rechargeable battery. Although this chip is an analog chip, it has 86 programmable subject parameters and is robust to power-supply noise, thermal noise, 1/f noise, transistor mismatch, and temperature variations. The chip is being explored for use in portable speech recognition systems as well.

Work in the lab has led to a bio-inspired asynchronous interleaved sampling algorithm (AIS) and chip for low-power processing and neural stimulation. The AIS algorithm encodes phase information with good fidelity, an important requirement for music.

The silicon cochlea maps the biophysics of the inner ear to a chip. The silicon cochlea has the potential to revolutionize speech recognition and cochlear-implant subject performance in the presence of background noise — a critical limiting factor today – while doing hundreds of mega floating point operations per second on a modest mW of power. A novel ear-inspired companding noise-reduction algorithm that arose out of work on the silicon cochlea has shown promise for improving recognition in noise in cochlear-implant subjects.

Selected Publications

  1. THE ANALOG BIONIC EAR PROCESSOR (JOURNAL ARTICLE): R. Sarpeshkar, C. Salthouse, J.J. Sit, M. Baker, S. Zhak, T. Lu, L. Turicchia, and S. Balster, “An Ultra-Low-Power Programmable Analog Bionic Ear Processor,” IEEE Transactions on Biomedical Engineering, Vol. 52, No. 4, pp. 711-727, April 2005.
  2. THE ANALOG BIONIC EAR PROCESSOR (BEST PERFORMANCE): R. Sarpeshkar, M. Baker, C. Salthouse, J.J. Sit, L. Turicchia, and S. Zhak, “An Analog Bionic Ear Processor with Zero-Crossing Detection,” Proceedings of the IEEE International Solid State Circuits Conference (ISSCC), San Francisco, CA, Paper 4.2, pp. 78-79, February 6-10, 2005.
  3. THE COMPANDING NOISE-REDUCTION ALGORITHM: L. Turicchia and R. Sarpeshkar, “A Bio-Inspired Companding Strategy for Spectral Enhancement,” IEEE Transactions on Speech and Audio Processing, Vol. 13, No. 2, pp. 243-253, March 2005.
  4. THE ASYNCHRONOUS SAMPLING ALGORITHM (AIS): J. Sit, A. M. Simonson, A. J. Oxenham, M. A. Faltys, and R. Sarpeshkar, “A low-power asynchronous interleaved sampling algorithm for cochlear implants that encodes envelope and phase information“, IEEE Transactions on Biomedical Engineering, Vol. 54, pp. 138-149, 2007.
  5. THE ASYNCHRONOUS STIMULATION (AIS) BIONIC EAR PROCESSOR: J. Sit and R. Sarpeshkar, “A Cochlear-Implant Processor for Encoding Music and Lowering Stimulation Power,” IEEE Pervasive Computing–special issue on implantable electronics, Vol. 1, No. 7, pp. 40-48, 2008.
  6. THE SILICON COCHLEA: R. Sarpeshkar, R.F. Lyon, and C.A. Mead, “A Low-Power Wide-Dynamic-Range Analog VLSI Cochlea,” Analog Integrated Circuits and Signal Processing, Vol. 13, pp. 123-151, 1997.
  7. VOCAL-TRACT-BASED SPEECH-PROSTHESIS: K. H. Wee and L. Turicchia and R. Sarpeshkar, “An Analog Integrated-Circuit Vocal Tract,” IEEE Transactions on Biomedical Circuits and Systems, Vol.2, No. 4, pp. 316-327, 2008.
  8. VOCAL-TRACT-BASED ALGORITHM FOR IMPROVING HEARING IN NOISE: K. H. Wee, L. Turicchia and R. Sarpeshkar, “An Articulatory Silicon Vocal Tract for Speech and Hearing Prostheses,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 5, No. 4, pp. 339-346, 2011.

Wireless Noninvasive or Wearable Medical and Cardiac Monitoring

New electronics for non-invasive medical monitoring promise low-cost, maintenance-free, and lightweight devices. These devices are critical in long-term medical measurements and in home-based tele-monitoring services, which are extremely important for the reduction of health care costs.

Circuits for ultra low power medical monitoring include those for electrocardiogram amplifiers, pulse oximeters for noninvasive measurements of oxygen saturation, phonocardiographs for measurements of heart sounds, compression of cardiac information via simple heart models, and RF antenna-based systems for self-powered energy-harvesting medical tags.

Selected Publications

  1. LOW-POWER CARDIAC MONITORING OVERVIEW PAPER : L. Turicchia, B. Do Valle, J. Bohorquez, W. Sanchez, V. Misra, L. Fay, M. Tavakoli, and R. Sarpeshkar, “Ultra Low Power Electronics for Cardiac Monitoring,” Invited Paper, IEEE Transactions on Circuits and Systems I. Vol. 57, No. 9, pp. 2279-2290, 2010.
  2. LOW-POWER MEDICAL MONITORING OVERVIEW PAPER : L. Turicchia, S. Mandal, M. Tavakoli, L. Fay, V. Misra, J. Bohorquez, W. Sanchez, and R. Sarpeshkar, “Ultra-low-power Electronics for Non-invasive Medical Monitoring,” Invited Paper, Proceedings of the IEEE Custom Integrated Circuits Conference (CICC 2009), pp. 85-92, San Jose, California, USA, September 13-16, 2009.
  3. MICROPOWER ELECTROCARDIOGRAM AMPLIFIER: L. Fay, V. Misra, and R. Sarpeshkar, “A Micropower Electrocardiogram Amplifier,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 3, No. 5, pp. 312-320, October 2009.
  4. ENERGY-HARVESTING BATTERY-FREE TAG FOR BODY SENSOR NETWORKS: S. Mandal, L. Turicchia, and R. Sarpeshkar, “A Low-Power Battery-Free Tag for Body Sensor Networks,” IEEE Pervasive Computing, Vol. 9, No. 1, pp. 71-77, January-March 2010.
  5. ANALOG IC MODEL OF HEART: J. Bohorquez, W. Sanchez, L. Turicchia, and R. Sarpeshkar, “An Integrated-Circuit Switched-Capacitor Model and Implementation of the Heart,” Invited Paper, Proceedings of the First International Symposium on Applied Sciences in Biomedical and Communication Technologies (ISABEL), pp. 1-5, Aalborg, Denmark, 25-28 October 2008.
  6. ENERGY-HARVESTING RF ANTENNA FOR BATTERY-FREE MEDICAL MONITORING: S. Mandal and R. Sarpeshkar, Low Power CMOS Rectifier Design for RFID Applications,” IEEE Transactions on Circuits and Systems I, Vol. 54, No. 6, pp. 1177-1188, June 2007.
  7. ULTRA-LOW-POWER ELECTRONICS FOR MEDICINE: R. Sarpeshkar, “Ultra Low Power Electronics for Medicine,” Proceedings of the International Workshop on Wearable and Implantable Body Sensor Networks (BSN 2006), p. 37, 3-5 April 2006.
  8. ULTRA-LOW-POWER PULSE OXIMETER: M. Tavakoli, L. Turicchia, and R. Sarpeshkar, “An Ultra-Low-Power Pulse Oximeter Implemented with an Energy-Efficient Transimpedance Amplifier,” IEEE Transactions on Biomedical Circuits and Systems, Vol. 4, No. 1, pp. 27-38, Feb. 2010.

Circuits for Biomedical and Other Applications

Several circuits in our lab developed for biomedical applications have uses in other domains and advance frontiers in ultra-low-power, precision, or feedback-circuit design. For example, an energy-harvesting RF-ID tag that can rectify RF energy at levels as low as 6uW, can be used for battery-free heart monitoring of electrocardiogram signals or in general-purpose RF-ID tags to create a battery. Several circuits developed for use in the bionic ear processor, e.g., low-power microphone front ends, automatic gain control circuits, filtering circuits, energy-extraction circuits, and logarithmic analog-to-digital converters, are useful in other application domains. A predictive comparator with adaptive control, developed in our lab, has been used in Professor Wyatt’s lab for improving the energy efficiency of an RF power system for the blind and has applications in power-electronic systems. An ultra-low-noise capacitance-measuring circuit, capable of detecting a 1 part per 8 million change in capacitance of a MEMS capacitance sensor, is being explored for use in various bio-molecular sensing applications. Our lab has developed an analog memory element with an ultra-low-leakage switch that achieves 5 electrons per second leakage in 0.5um technology and is capable of storing an 8-bit number without degradation for over 4 hours. Some of Professor Sarpeshkar’s early work at Bell Labs was important in helping pioneer the integration of organic circuits. His wide-linear-range transconductance amplifier innovated novel techniques in the use of the well of the transistor as an input, led to the invention of gate degeneration, and is widely used. He also made the first experimental measurements of noise in subthreshold transistors, which was important in revealing the deep connection between thermal noise and shot noise.

Selected Publications

  1. 23-BIT-PRECISE MEMS CAPACITANCE SENSOR: M. Tavakoli and R. Sarpeshkar, “An Offset-Cancelling Low-Noise Lock-in Architecture for Capacitive Sensing,” IEEE Journal of Solid State Circuits, Vol. 38, No. 2, pp. 244-253, 2003.
  2. MICROPOWER RF-ID ENERGY-HARVESTING TAG: S. Mandal and R. Sarpeshkar, “Low Power CMOS Rectifier Design for RFID Applications,” IEEE Transactions on Circuits and Systems I, Vol. 54, No. 6, June 2007.
  3. ULTRA-ENERGY-EFFICIENT PREDICTIVE COMPARATOR: A. MeVay and R. Sarpeshkar, “Predictive Comparators with Adaptive Control,” IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 50, No. 10 pp. 579-588, 2003.
  4. LOW-POWER MICROPHONE PREAMPLIFIER: M. Baker and R. Sarpeshkar, “A Low-Power High-PSRR Current Mode Microphone Preamplifier,” IEEE Journal of Solid State Circuits, Vol. 38, No. 10 pp. 1671-1678, 2003.
  5. LOW-POWER AUTOMATIC GAIN CONTROL (AGC) CIRCUITS: M. Baker and R. Sarpeshkar, “Low-Power Single Loop and Dual-Loop AGCs for Bionic Ears,” IEEE Journal of Solid-State Circuits, Vol. 41, No. 9, pp 1983—1996, September 2006.
  6. MICROPOWER BANDPASS FILTER: C. Salthouse and R. Sarpeshkar, “A Practical Micropower Programmable Bandpass Filter for use in Bionic Ears,” IEEE Journal of Solid State Circuits, Vol. 38, No. 1, pp. 63-70, 2003.
  7. ADAPTIVELY BIASED BANDPASS FILTERS: S. K. Arfin, S. Mandal and R. Sarpeshkar, “Dynamic-Range Analysis and Maximization of Micropower Gm–C Bandpass Filters by Adaptive Biasing,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), Taipei, Taiwan, May 2009, pp. 2954-2957.
  8. MICROPOWER ENVELOPE DETECTOR: S. Zhak, M. Baker, and R. Sarpeshkar, “A Low Power Wide Dynamic Range Envelope Detector,” IEEE Journal of Solid State Circuits, vol. 38 (10), pp.1750-1753, 2003.
  9. MICROPOWER LOGARITHMIC ANALOG-TO-DIGITAL CONVERTER: J.J. Sit and R. Sarpeshkar, “A micropower logarithmic A/D with offset and temperature compensation,” IEEE Journal of Solid State Circuits, Vol. 39, No. 2, pp. 308-319, 2004.
  10. ANALOG MEMORY CIRCUIT (LOW LEAKAGE): M. O’Halloran and R. Sarpeshkar, “A 10nW 12-bit Accurate Analog Storage Cell with 10aA Leakage,” IEEE Journal of Solid-State Circuits, Vol. 39, No. 11, pp. 1985-1996 November 2004.
  11. ANALOG MEMORY CIRCUIT (ULTRA LOW LEAKAGE): M. O’Halloran and R. Sarpeshkar, “An Analog Storage Cell with 5 electron/sec Leakage,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2006), Kos, Greece, pp. 557-560, May 21-24, 2006.
  12. POWER-ADAPTIVE OPERATIONAL AMPLIFIER: B. Kim , S. Mandal, and R. Sarpeshkar, “Power-adaptive Operational Amplifier with Positive-Feedback Self Biasing,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2006, Kos, Greece, 4 pages, May 21-24, 2006.
  13. FIRST ALL-ORGANIC (PLASTIC) INTEGRATED CIRCUIT: B. Crone , A. Dodabalapur, Y. Y. Lin, R. W. Filas, Z. Bao, A. LaDuca, R. Sarpeshkar, H. E. Katz, and W. Li, “Large Scale Complementary Integrated Circuits Based on Organic Transistors,” NATURE, Vol. 403, pp. 521-523, 3rd February 2000.
  14. LOW-POWER TRANSCONDUCTANCE AMPLIFIER: R. Sarpeshkar, R.F. Lyon, and C.A. Mead, “A Low-Power Wide-Linear-Range Transconductance Amplifier,” Analog Integrated Circuits and Signal Processing, Vol. 13, pp. 123-151, 1997.
  15. UNITY BETWEEN SHOT NOISE AND THERMAL NOISE: R. Sarpeshkar , T. Delbruck, and C.A. Mead, “White Noise in MOS Transistors and Resistors,” IEEE Circuits and Devices, Vol. 9, No. 6, pp. 23-29, 1993.