Jorge Fernandez Villena
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Jorge Fernández Villena was born in Avilés, Spain, in 1980. He received his Degree on Telecommunications Engineering from Universidad de Cantabria, Spain, in 2005, and his Ph.D. in Electrical and Computer Engineering from Instituto Superior Técnico, Technical University of Lisbon, Portugal, in 2010. From 2005 to 2012 he was a researcher at the Instituto de Engenharia de Sistemas e Computadores, Investigaçao e Desenvolvimento (INESC ID) em Lisboa, Portugal.
Currently, he is a Post-Doctoral Associate at Massachusetts Institute of Technology, USA, working as researcher for the Computational Prototyping Group at the Research Laboratory of Electronics. His research interests include development and implementation of numerical methods and algorithms for analysis and simulation of physical problems encountered in engineering applications (such as IC design, circuit simulation, EM analysis, or MRI system design), with emphasis on model order reduction.