Energy-Efficient
Multimedia Systems Group

Professor Vivienne Sze

Publications

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Journal & Magazine Publications

  • Y-H. Chen, V. Sze, “A Deeply Pipelined CABAC Decoder for HEVC Supporting Level 6.2 High-tier Applications,” to appear in IEEE Transactions on Circuits and Systems for Video Technology (TCSVT). [ Link ]
  • M. Tikekar, C.-T. Huang, C. Juvekar, V. Sze, A. P. Chandrakasan, “A 249 MPixel/s HEVC Video-Decoder Chip for 4K Ultra HD Applications,” IEEE Journal of Solid State Circuits (JSSC), ISSCC Special Issue, Vol. 49, No. 1, pp. 61-72, January 2014. [ Link ]
  • M. E. Sinangil, V. Sze, M. Zhou, A. P. Chandrakasan, “Cost and Coding Efficient Motion Estimation Design Considerations for High Efficiency Video Coding (HEVC) Standard,” IEEE Journal of Selected Topics in Signal Processing, Vol. 7, No.6, pp.1017-1028, December 2013. [ LinkJ-STSP Top 25 Most Downloaded (Oct 2013 – March 2014).
  • M. Budagavi, A. Fuldseth, G. Bjontegaard, V. Sze, M. Sadafale, “Core Transform Design in the High Efficiency Video Coding (HEVC) Standard,” IEEE Journal of Selected Topics in Signal Processing, Vol.7, No. 6, pp. 1029-1041, December 2013. [ LinkJ-STSP Top 25 Most Downloaded (Aug 2013 – Aug 2014).
  • V. Sze, M. Budagavi, “High Throughput CABAC Entropy Coding in HEVC,” IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), Vol. 22, No. 12, pp. 1778-1791, December 2012. [ Link ] TCSVT Top 25 Most Downloaded (June 2013, Aug 2013, Nov 2013, April 2014).
  • V. Sze, A. P. Chandrakasan, “Joint Algorithm-Architecture Optimization of CABAC,” Journal of Signal Processing Systems,  ICASSP-DISPS Track Special Issue, Vol. 69, Issue 3, pp. 239-252, December 2012. [ Link ]
  • V. Sze, A. P. Chandrakasan, “A Highly Parallel and Scalable CABAC Decoder for Next-Generation Video Coding,” IEEE Journal of Solid-State Circuits (JSSC), ISSCC Special Issue, Vol. 47, No. 1, pp. 8-22, January 2012. [ Link ]
  • A. P. Chandrakasan, D. C. Daly, D. F. Finchelstein, J. Kwong, Y. K. Ramadass, M. E. Sinangil, V. Sze, N. Verma, “Technologies for Ultra Dynamic Voltage Scaling,” Proceedings of the IEEE, Vol. 98, No. 2, pp. 191-214, February 2010. [ Link ]
  • V. Sze, D. F. Finchelstein, M. E. Sinangil, A. P. Chandrakasan, “A 0.7-V 1.8-mW H.264/AVC 720p Video Decoder,” IEEE Journal of Solid State Circuits (JSSC), A-SSCC Special Issue , Vol. 44, No. 11, pp. 2943-2956, November 2009. [ PDF ]
  • D. F. Finchelstein, V. Sze, A. P. Chandrakasan, “Multi-Core Processing and Efficient On-Chip Caching for H.264 and Future Video Decoders,” IEEE Transactions on Circuits and Systems for Video Technology (TCSVT), Vol. 19, No. 11, pp. 1704-1713, November 2009. [ PDF ] Nominated for Best Paper Award.
  • A. P. Chandrakasan, F. S. Lee, D. D. Wentzloff, V. Sze, B. P. Ginsburg, P. P. Mercier, D. C. Daly, R. Blazquez, “Low-Power Impulse UWB Architectures and Circuits,” Proceedings of the IEEE, Vol. 97, No. 2, pp. 332-352, February 2009. [ PDF ]

Conference Proceedings 

  • A. Suleiman, V. Sze, “Energy-Efficient HOG-based Object Detection at 1080HD 60 fps with Multi-Scale Support,” IEEE International Workshop on Signal Processing Systems (SiPS), pp. 256-261, October 2014. [ PDF ]
  • Y.-H. Chen, V. Sze, “A 2014 Mbin/s Deeply Pipelined CABAC Decoder For HEVC,” to appear at IEEE International Conference on Image Processing (ICIP)October 2014.
  • M. Tikekar, C.-T. Huang, V. Sze, A. Chandrakasan, “Energy and Area-Efficient Hardware Implementation of HEVC Inverse Transform and Dequantization,” to appear at IEEE International Conference on Image Processing (ICIP)October 2014. Top 10% Paper Recognition at ICIP
  • V. Sze, M. Budagavi, “A Comparison of CABAC Throughput for HEVC/H.265 Vs. AVC/H.264,” IEEE Workshop on Signal Processing Systems (SiPS), pp. 165-170, October 2013. [ Link ]
  • C.-T. Huang, M. Tikekar, C. Juvekar, V. Sze, A. P. Chandrakasan, “A 249Mpixels/s HEVC Video Decoder Chip for Quad Full HD Applications,” IEEE International Conference on Solid-State Circuits (ISSCC), pp. 162-163, February 2013. [ Link ]
  • M. E. Sinangil, V. Sze, M. Zhou, A. P. Chandrakasan, “Memory cost vs. Coding efficiency trade-offs for HEVC motion estimation engine,” IEEE International Conference on Image Processing (ICIP), pp. 1533-1536, September 2012. [ Link ]
  • M. E. Sinangil, V. Sze, M. Zhou, A. P. Chandrakasan, “Hardware-aware motion estimation search algorithm development for High-Efficiency Video Coding (HEVC) standard,” IEEE International Conference on Image Processing (ICIP), pp. 1529-1532, September 2012. [ Link ]
  • M. Budagavi, V. Sze, “Unified forward+inverse transform architecture for HEVC,” IEEE International Conference on Image Processing (ICIP), pp. 209-212, September 2012. [ Link ]
  • M. Zhou, V. Sze, M. Budagavi, “Parallel Tools in HEVC for High-Throughput Processing,” SPIE Optical Engineering + Applications, Applications of Image Processing XXXV, August 2012. [ Link ]
  • V. Sze, M. Budagavi, “Parallelization of Transform Coefficient Coding for HEVC,” IEEE Picture Coding Symposium (PCS), pp. 509 – 512, May 2012. [ Link ]
  • M. Budagavi, V. Sze, M. Zhou, “HEVC ALF decode complexity analysis and reduction,” IEEE International Conference on Image Processing (ICIP), pp. 745-748, September 2011. [ Link ]
  • V. Sze, A. P. Chandrakasan, “Joint Algorithm-Architecture Optimization of CABAC to Increase Speed and Reduce Area Cost,” IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. 1577–1580, May 2011. [ Link ]
  • V. Sze, A. P. Chandrakasan, “A Highly Parallel and Scalable CABAC Decoder for Next-Generation Video Coding,” IEEE International Conference on Solid-State Circuits (ISSCC), pp. 126-127, February 2011. [ Link ] Highlighted in EEtimes.
  • V. Sze, A. P. Chandrakasan, “A High Throughput CABAC Algorithm Using Syntax Element Partitioning,” IEEE International Conference on Image Processing (ICIP), pp. 773-776, November 2009. [ paper PDF | slides PDF ]
  • D. F. Finchelstein, V. Sze, M. E. Sinangil, Y. Koken, A. P. Chandrakasan, “A Low-Power 0.7-V H.264 720p Video Decoder,” IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 173-176, November 2008. [ paper PDF | slides PDF ] Student Design Contest Winner and selected as one of 9 noteworthy technical papers at the conference.
  • V. Sze, M. Budagavi, A. P. Chandrakasan, M. Zhou, “Parallel CABAC for Low Power Video Coding,” IEEE International Conference on Image Processing (ICIP), pp. 2096-2099, October 2008. [ paper PDF | poster PDF ]
  • V. Sze, A. P. Chandrakasan, “A 0.4-V UWB Baseband Processor,” IEEE International Symposium Low Power Electronics and Design (ISLPED), pp. 262-267, August 2007. [ paper PDF | slides PDFFinalist for Best Paper Award.
  • B. P. Ginsburg, V. Sze, A. P. Chandrakasan, “A Parallel Energy Efficient 100Mbps Ultra-Wideband Radio Baseband,” Government Microcircuit Applications & Critical Technology Conference (GOMACTech), pp. 75-78, March 2007.
  • V. Sze, R. Blazquez, M. Bhardwaj, A. Chandrakasan, “An Energy Efficient Sub-Threshold Baseband Processor Architecture for Pulsed Ultra-Wideband Communications,” IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), pp. (III) 908-911, May 2006. [ paper PDF | slides PDF ]